FIELD OF THE INVENTION
The present invention relates to an EEPROM formed of a plurality of memory cells, which are programmable, readable and erasable via selection, control, bit and source lines. Each of the memory cells contains a memory transistor and a selection transistor connected in series with the memory transistor. A drain terminal of the memory transistor is connected to the bit line and the source terminal of the selection transistor is connected to the source line.
EEPROMs are nonvolatile, electrically programmable and electrically erasable memories. The nucleus of each memory cell of an EEPROM is its memory transistor.
The memory transistor, like "normal" transistors, that is, transistors without a memory, has a source segment embedded in a substrate, a drain segment also embedded in the substrate, and a (control) gate segment (control gate) disposed above the substrate. Unlike normal transistors, a so-called floating gate is electrically insulated from the substrate and the control gate by insulation layers provided between the substrate and control gate.
To prevent other (adjacent) memory cells from being read out, overwritten and/or erased when a particular memory cell is being read, written on and/or erased, each memory cell includes a second transistor, more specifically a selection transistor, which is formed by a "normal" transistor.
Memory cells of this type can be programmed, read out and erased via the selection, control, bit and source lines. The selection line is connected to a gate portion of the selection transistor. The control line formed by a so-called word line is connected to a control gate of the memory transistor. The bit line is connected to a drain portion of the selection transistor, and the source line is connected to the source portion of the memory transistor.
Via the selection, the control, the bit and the source lines, in the programming, reading and erasing processes, voltages are typically applied to the corresponding (selected) memory cells and the memory cells not to be addressed (not selected). This requires a relatively high voltage at the gate of the selection transistor. This high voltage (needed constantly or frequently) prevents the EEPROM from being capable of being operated with a very low supply voltage, for which there is widespread demand; in any case, it is not possible to lower the supply voltage to below 2.5 V.
Solutions proposed to provide an EEPROM operable with a low supply voltage have resulted in complicated programming procedures that may cause stored information to be lost.